.\" Automatically generated by Pandoc 2.5
.\"
.TH "mlx5dv_alloc_dm" "3" "2018\-9\-1" "mlx5" "mlx5 Programmer\[cq]s Manual"
.hy
.SH NAME
.PP
mlx5dv_alloc_dm \- allocates device memory (DM)
.SH SYNOPSIS
.IP
.nf
\f[C]
#include <infiniband/mlx5dv.h>

struct ibv_dm *mlx5dv_alloc_dm(struct ibv_context *context,
                   struct ibv_alloc_dm_attr *dm_attr,
                   struct mlx5dv_alloc_dm_attr *mlx5_dm_attr)
\f[R]
.fi
.SH DESCRIPTION
.PP
\f[B]mlx5dv_alloc_dm()\f[R] allocates device memory (DM) with specific
driver properties.
.SH ARGUMENTS
.PP
Please see \f[I]ibv_alloc_dm(3)\f[R] man page for \f[I]context\f[R] and
\f[I]dm_attr\f[R].
.SS mlx5_dm_attr
.IP
.nf
\f[C]
struct mlx5dv_alloc_dm_attr {
    enum mlx5dv_alloc_dm_type type;
    uint64_t comp_mask;
};
\f[R]
.fi
.TP
.B \f[I]type\f[R]
The device memory type user wishes to allocate:
.RS
.PP
MLX5DV_DM_TYPE_MEMIC Device memory of type MEMIC \- On\-Chip memory that
can be allocated and used as memory region for transmitting/receiving
packet directly from/to the memory on the chip.
.PP
MLX5DV_DM_TYPE_STEERING_SW_ICM Device memory of type STEERING SW ICM \-
This memory is used by the device to store the packet steering tables
and rules.
Can be used for direct table and steering rules creation when allocated
by a privileged user.
.PP
MLX5DV_DM_TYPE_HEADER_MODIFY_SW_ICM Device memory of type HEADER MODIFY
SW ICM \- This memory is used by the device to store the packet header
modification tables and rules.
Can be used for direct table and header modification rules creation when
allocated by a privileged user.
.RE
.TP
.B \f[I]comp_mask\f[R]
Bitmask specifying what fields in the structure are valid: Currently
reserved and should be set to 0.
.SH RETURN VALUE
.PP
\f[B]mlx5dv_alloc_dm()\f[R] returns a pointer to the created DM, on
error NULL will be returned and errno will be set.
.SH SEE ALSO
.PP
\f[B]ibv_alloc_dm\f[R](3),
.SH AUTHOR
.PP
Ariel Levkovich <lariel@mellanox.com>
