* Phytium SGPIO controller

This SGPIO controller is for Phytium Pe220x SoCs, which supports up to
96 (32x3) Serial GPIOs.

Required properties:
- compatible : Should contain "phytium,gpio"
- reg : Address and length of the register set for the device.
- interrupts: Interrupt mapping for GPIO IRQ.
- gpio-controller : Marks the device node as a gpio controller.
- #gpio-cells : Should be 2. The first cell is the pin number and
  the second cell is used to specify the gpio polarity:
      0 = active high
      1 = active low
- ngpios: number of GPIO lines, see gpio.txt
          (should be multiple of 32, up to 96 pins)
- bus-frequency: SGPIO CLK frequency
- clocks: A phandle to the APB clock for SGPIO clock division

Example:

sgpio: sgpio@2807d000 {
	compatible = "phytium,sgpio";
	reg = <0x0 0x2807d000 0x0 0x1000>;
	interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
	clocks = <&sysclk_48mhz>;
	ngpios = <96>;
	bus-frequency = <48000>;
	gpio-controller;
	#gpio-cells = <2>;
};
